This month's online Rougol talk featured Sophie Wilson. It was certainly a popular talk (Bryan had to up his Zoom license) with over 130 attendees (lucky we were not all trying to squeeze into the pub room).
To start a talk about the future, we needed to look at the history of microprocessors. They have become 10,000 times faster in their 40 year history. We started with Moore's law, which is actually an observation, not a law. Not quite doubling every 2 years at the moment.
Sophie looked at the classic 6502 CPU with its 4,000 transistors. Designed entirely by hand on paper. Smallest feature is 6 microns. Not enough transistors for features like multiply.
ARM1 had 25,000 transistors which allows a lot more functionality such as more registers and more powerful commands. Smallest feature is 3 micron and faster. ARM assembly code is much simpler than 6502 and part of this because code is simpler. Pipeline further speeds things up and faster clock. So ARM 12 times faster than 6502 or quicker. ARM1 followed by more complicated ARM chips with more transistors.
Firepath (2003) processor has 6 million transistors. More complex instructions.
As most processors now complex enough, more transistors now used for adding more processors. Second Law - Gene Amdahl states Speed-up of multiple processors is limited by sequential part of the program. More processors does not keep making things faster. If you can only split the program into 2 separate functions, there is no gain from more than 2 cores.
But industry will continue to create chips with more cores. Scalar programming languages are a poor fit for parallel hardware. More transistors aren't as useful after a point either. So diminishing returns. New tricks like out of order processors useful but still slowdown in growth - end of 'easy' Moore's law. More transistors leads to more heat. Intel had to redesign their chips after P4 to use less power/create less heat. As we go forward, more chips will have parts turned off when running.
No immediate physical limit to scaling but below 28nm production costs are far more. So end to faster, cheaper chips.
18 times as many scientists needed now to maintain Moore's law compared to 1970s.
In April 2002, head of Intel predicted 30GHz, 10 billion transistors by 2010 (which did not happen for reasons above). Intel have struggled in recent years and behind TSMC.
There are fewer Fabs (chip makers) because chip manufacturing is getting more complex and expensive. TSMC spends about 30 billion USD a year on their chip fabs.
Single thread performance has levelled off. We can still use more transistors.
Today we have superscalar out of order processors which can do 6-8 operations per cycle. Quick but not very energy efficient. Gains beyond 6 operations limited.
After a quick break, Sophie then gave us a glimpse of the future....
Mix of big and little cores tries to solve power issue with power and efficiency cores. Used by everyone currently except Intel (who are likely to adopt).
New unconventional designs using VLIW principle for DPSs and AI cores.
What we compute is changing (ie more Deep learning) leading to different core designs. Easier to make these types of problem parallel.
We now have complete systems on a chip - Nvidia has a 9 billion transistor chip covered in processors.
Transistors will get more complex so they can be packed more densely.
It is no longer cost effective to build whole SoCs in most advanced processes as too expensive. So only used for part of chip.
Chips will get direct cooling to remove all the heat.
Wafer scale integration will allow much larger chips.
After the talk there was time for questions, including the inevitable Nvidia one.
The talk covered a large amount of technical material in some detail, but Sophie made it all really accessible and simple. If you missed the talk, watch the youtube recording when it comes out!
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